Why the single-ended impedance on the PCB controls 50 ohms?

Written By:Syspcb Updated: 2025-4-2

In high-speed PCB design, controlling the impedance of single ended traces to 50 ohms has become the industry’s default standard. This value is not accidental, but a deep combination of historical evolution, electromagnetic optimization, and manufacturing feasibility. This article will reveal the scientific logic behind 50 ohms and guide engineers to flexibly respond to diverse design scenarios.   


The military demands of World War II gave rise to standardization

In the 1940s, the impedance of microwave conduits used by the US Army and Navy was approximately 51.5 ohms (temporarily assembled from ruler rods and water pipes). To address compatibility issues between military branches, the Joint Army Navy Organization (JAN) has established a specialized team to select 50 ohms as the unified standard and manufacture specialized conduits after comprehensive evaluation.   

50 ohm impedance PCB
50 ohm impedance PCB

Compromise and Unification of European Standards

Europe initially adopted the 60 ohm standard, but under the leadership of American tech giants such as Hewlett Packard, European manufacturers were forced to switch to the 50 ohm system, ultimately leading to the unification of the global electronics industry.   

>Key turning point: Standardization of cables and connectors promotes PCB impedance matching – to be compatible with coaxial cable interfaces, PCB routing naturally follows the 50 ohm standard.   


1. Minimize skin effect loss

Dr. Howard Johnson derived from electromagnetic formulas:

-Coaxial cable unit length loss L ∝ R/Z ₀ (R is the total skin resistance, Z ₀ is the characteristic impedance)

-Total resistance R ∝ (1/d ₁+1/d ₂) (d ₁/d ₂ is the ratio of inner and outer conductor diameters)

-When d ₂/d ₁ ≈ 3.5911 and the dielectric constant εᵣ=2.25 (polyethylene), Z ₀=51.1 Ω, the skin effect loss is the lowest.   

2. The birth of engineering approximations

The radio engineer simplified 51.1 Ω to 50 Ω, improving practicality while retaining over 97% of the optimization effect.   

Table: Relationship between Impedance and Loss of Coaxial Cable

Impedance (Ω)d ₂/d ₁ ratioSkin loss comparison 50 Ω amplification
503.5911Reference value
756.0+12%
302.3+18%
50 ohm impedance PCB

1. PCB process friendliness

-Compatibility between line width and medium thickness:

To achieve 50 Ω on FR-4 board (εᵣ≈ 4.2), only a 4-6mil line width is required, while 75 Ω requires ≤ 3mil of fine wire (yield ↓ 30%), and 37 Ω requires ≥ 8mil of wide wire (difficult for high-density wiring).   

-Processing reliability:

The 50 Ω design has a higher tolerance for copper thickness tolerance during multi-layer board lamination (± 10% vs ± 5% for high impedance design).   

2. Compromise optimization of electrical performance

Performance dimensionLow impedance advantageHigh impedance advantage50 Ω compromise solution
EMI suppressionStrong (low near-field radiation)WeakMedium, acceptable
Chip driving capabilityMost ICs can drive 50 Ω loadsEasy to drive but signal integrity risk ↑Compatible with 90% commercial chips
Crosstalk toleranceCrosstalk at low spacing ↓ 40%Sensitivity ↑3W rule can effectively control

1. 75 Ω: Video and Remote Communication Standard

-Theoretical basis: Under the same shielding layer diameter, the loss of 75 Ω is only 12% higher than that of 50 Ω, making it suitable for long-distance transmission.   

-Typical applications:

-Radio frequency cable for cable television (CATV)

-Video interface (such as CVBS)

2. Differential impedance: 90 Ω and 100 Ω

-HDMI/USB application: 90 Ω differential pair (equivalent single ended 45 Ω) reduces common mode noise.   

-Ethernet standard: 100 Ω differential impedance matching CAT6 cable characteristics.   

3. Low impedance scheme (37 Ω/42 Ω)

-High performance processor requirements: Intel chips require 42 Ω to reduce synchronous switching noise (SSN).   

-Cost: Need to increase the number of layers (≥ 8 layers) or use ultra-thin media (cost increased by 25%).   


1. Calculation tools and core parameters

-Recommended tool: Polar SI9000 (industry standard).   

-Four input parameters:

1. Medium thickness (H): distance from the signal layer to the reference plane

2. Wiring width (W): Actual width of copper foil after etching

3. Copper thickness (T): Inner layer 1oz=1.4mil, surface layer 0.5oz=0.7mil

4. Dielectric constant (εᵣ): FR-4 takes 4.2-4.5, and high-frequency plates such as Rogers 4350B take 3.48.   

2. Example of impedance calculation for 6 layers board

plaintext
Board: FR-4, board thickness 1.2mm
Stacking: L1 (signal) – L2 (GND) – L3 (signal) – L4 (power) – L5 (GND) – L6 (signal)
Goal: Surface 50 Ω single ended wiring
Enter Polar SI9000:
H=3.65ml (PP thickness), T=0.7mil (surface copper thickness), ε ᵣ=4.2
Result: W ₀=6.8mil → Fine tuning to 5.5mil yields 54.8 Ω (qualified within ± 10% tolerance)

3. Special scenario solutions

-Implementation of 50 Ω double-sided board:

Using a coplanar waveguide model (Surface Coplanar Line) with a line width of 30mil and a copper spacing of 7mil on both sides, the impedance is approximately 52 Ω when the plate thickness is 1mm.   


1. High speed digital circuits:

-DDR4/5 memory cable: strictly maintain 50 Ω± 5%

-Server boards above 22 layers: Priority should be given to following chip vendor specifications (such as Intel 42 Ω)

2. RF and microwave circuits:

-28GHz 5G base station: Rogers 4350B board is selected, with ε ᵣ=3.48 to optimize losses

-Antenna feeder: matched with 75 Ω coaxial cable

3. Cost sensitive design:

-Consumer Electronics HDMI Interface: 90 Ω Differential Pair+FR-4 Stacked

-Double sided LED driver: coplanar waveguide replaces four layer board

→ [Download PCB Impedance Design Quick Reference Manual] ()

Including Polar calculation template, stacked scheme library, and tolerance compensation algorithm

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